

California Triangle provides high-performance, low-noise clock generators for communication, radar, measurement, and industrial control fields. Utilizing ADPLL (All-Digital Phase-Locked Loop) technology, it achieves optimal high-frequency low phase noise performance while featuring low power consumption and high PSNR capability, achieving phase jitter performance of less than 0.3ps RMS. It can output differential 100MHz, 125MHz, 156.25MHz, and single-ended 33.33MHz CPU clocks, while simultaneously outputting 6 channels of 25MHz buffered reference clocks.
Technical Specifications
Model | Input Frequency | Input Level Type | Number of Input Ports | Output Level Type | Output Frequency | Line Monitoring | Phase Jitter (12kHz to 20MHz) | Temperature Range | Packaging |
CTG510 | 25MHz | LVCMS Crystal Oscillator | 2 | 10 | LVCMOS LVPEC | 156.25MHz 125MHz 100MHz 33.33MHz 25MHz | 188fs (Typical Values) | -40~+85℃ | QFN40 |
Functional Diagram
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Contact Way
Tel
001-(408)-661-0087
Fax
001-(510)-853-6126
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