

California Triangle provides high-performance, low-noise differential clock buffers for communication, radar, measurement, and industrial control applications. These buffers are designed for high-frequency, low-jitter clock/data distribution and level shifting. The input clock can be selected from two differential inputs or one crystal input. The selected input clock is distributed to two sets of outputs, each set containing five differential outputs and one LVCMOS output with sync functionality. The two differential output groups can be independently configured to LVPECL, LVDS, or HCSL levels, or set to output high impedance.
Technical Specifications
Model | Frequency Range | Input Level Type | Number of Input Ports | Core Voltage | Output Voltage | Number of Output Ports | Output Level Type | Temperature Range | Packaging |
CT2301 | DC~2.1GHz | LVPECL LVDS HCSL SSTLLVCMOS/LVTTL Crystal Oscillator | 3 | 3.3V | 2.5V 3.3V | 11 | LVCMOS LVPECL LVDS HCSL | -40~+85℃ | QFN48 |
Functional Diagram
Product Recommendation
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Contact Way
Tel
001-(408)-661-0087
Fax
001-(510)-853-6126
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